1. Field of the Invention
The present invention relates to a semiconductor integrated circuit including a clock modulation circuit for modulating the frequency of a clock signal.
2. Description of the Related Art
Operating frequencies of semiconductor integrated circuits such as a microcomputer are improving every year. Accordingly, electromagnetic interference with electric devices, which are close to the semiconductor integrated circuit, turns into a problem. In concrete, noise radiated from the microcomputer and the like causes the neighboring electric devices to malfunction. Especially, since a clock signal is oscillated with a predetermined frequency at all times, it is likely to generate radiated noise.
In order to reduce the electromagnetic interference due to the clock signal, a clock modulation circuit has been developed. The clock modulation circuit is implemented in the microcomputer to modulate the frequency of the clock signal at all times. The clock signal is modulated to disperse a peak of the radiated noise, thereby reducing the electromagnetic interference. The clock signal which is modulated by the clock modulation circuit (hereinafter referred to as a modulated clock signal) is supplied to an internal circuit of the microcomputer and external devices (electric devices) connected to the microcomputer. Note that, when the clock modulation circuit is embedded in the microcomputer, operation speeds of the internal circuit and the external devices change according to the frequency of the modulated clock signal, but the change of the operation speeds has little effect on a system.
When the clock modulation circuit is embedded in the microcomputer, the external devices connected to the microcomputer operate upon receiving the modulated clock signal which is generated in the clock modulation circuit. The frequency of the modulated clock signal cannot exceed maximum operating frequencies of the external devices, and therefore, it is necessary to set the maximum operating frequency of the modulated clock signal in accordance with the external device with the slowest operation speed. In other words, timing of the system should be designed by inserting a wait cycle, on the assumption that the modulated clock signal is supplied to the external device with the slowest operation speed. As this result, the number of the extra wait cycles to be inserted increases when the frequency of the modulated clock circuit is low, which causes a problem that the performance of the system decreases in general when the clock modulation circuit is embedded in the microcomputer.
The performance of the system can be improved by supplying a different clock signal not modulated, to the external device with the slow operation speed. In this case, however, the effect of reducing the radiated noise is not enough.
It is an object of the present invention to reduce electromagnetic interference in a semiconductor integrated circuit including a clock modulation circuit, without decreasing the performance of a system including the semiconductor integrated circuit.
According to one of the aspects of the present invention, the clock modulation circuit modulates the frequency of a clock signal to generate a modulated clock signal. A wait requesting circuit receives frequency information indicating the frequency of the modulated clock signal and, when the frequency information indicates a frequency higher than a reference frequency, generates a wait requesting signal to an external bus interface. Since an optimum wait cycle is inserted to the external bus interface according to the change of the frequency of the modulated clock signal, external devices connected to the external bus interface can be operated without fail. Needless wait cycle can be prevented from being inserted to the external bus interface, and hence the performance of the system can be improved even when the clock modulation circuit is embedded in the semiconductor integrated circuit. In concrete, operation cycles of the external devices connected to the external bus interface can be shortened. As a result of this, it is possible to disperse the peak of radiated noise which is caused by the clock signal and to reduce electromagnetic interference, without decreasing the performance of the system. Namely, it can serve both market needs for reducing noise and speeding up.
According to another aspect of the present invention, the wait requesting circuit includes a frequency detecting circuit. The frequency detecting circuit successively receives pieces of timing information as the frequency information, the timing information indicating timing of edges of the modulated clock signal, and detects the frequency of the modulated clock signal from a difference between two pieces of the timing information. Namely, the frequency of the modulated clock signal can be easily detected only by determining the difference between two pieces of the timing information. Especially, the circuit scale of the semiconductor integrated circuit can be reduced when the timing information, which is used in the clock modulation circuit for generating the modulated clock signal, can be used.
According to another aspect of the present invention, the wait requesting circuit includes a holding circuit which latches the timing information. Contents of the holding circuit are overwritten every time the timing information is newly supplied thereto. Further, the timing information of the immediately preceding clock is held in the holding circuit at all times. The frequency detecting circuit determines the frequency of the modulated clock signal from the difference between a piece of the most current timing information and a piece of the timing information of the immediately preceding clock which is already held in the holding circuit. One of these pieces of timing information can be latched in the holding circuit, and therefore, the frequency of the modulated clock signal can be easily detected.
According to another aspect of the present invention, the wait requesting circuit includes a register which can set the reference frequency from the exterior. For this reason, the reference frequency can be set according to the operating frequencies of the external devices which are connected to the external bus interface, and the optimum wait cycle can be inserted to the external bus interface. In other words, the optimum wait cycle can be inserted to the external bus interface in accordance with system specifications of users.
According to another aspect of the present invention, the wait requesting circuit includes a plurality of registers, respectively holding a plurality of the reference frequencies. Moreover, the wait requesting circuit generates a plurality of the wait requesting signals according to the reference frequencies, respectively, when the frequency information indicates a frequency higher than the reference frequencies. For this reason, wait cycles of plural types can be inserted to the external bus interface, according to the frequency of the modulated clock signal. Since the number of the wait cycles to be inserted can be more strictly controlled, the performance of the system can be further improved.